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Tapeout Jobs

Browse 17 Tapeout jobs on Inference Jobs.

17 jobs

7 days ago Tenstorrent logo

Senior Physical Design Engineer

Tenstorrent

Austin, Texas, United States (Hybrid)$100–500K Yearly

4 wk. ago

Senior Engineer, Physical Design – EMIR

Tenstorrent

Austin, Texas, United States (Hybrid)$100–500K Yearly

Physical Design Engineer

Silicon Engineering

Physical Design

EMIR analysis

4 wk. ago

Senior Full Chip Layout and Physical Verification CAD Engineer

NVIDIA

Yokne'am, Northern District, Israel (On-site)

Physical Design Engineering

CAD Engineering

Python

Tcl

4 days ago Tenstorrent logo

Physical Design Engineer, AI Accelerator IP

Tenstorrent

Austin, Texas, United States (Hybrid)$100–500K Yearly

Physical Design Engineering

VLSI Design

Physical Design

Synthesis

2 wk. ago

Senior Manager, DPU Performance and System Validation

NVIDIA

Yokneam, Haifa District, Israel (On-site)

Performance Management

System Validation

DPU Performance

System Validation

1 day ago

Senior Physical Design Engineer

NVIDIA

US, MA, Westford, United States of America (On-site)$136–264.5K Yearly

1 wk. ago

Technical Program Manager, Silicon

Anthropic

San Francisco, California, United States (Hybrid)$365–435K Yearly

Technical Program Management

Silicon Program Management

Silicon/SoC Program Management

RTL Freeze

1 mo. ago

Senior DFT Design Engineer

NVIDIA

Yokneam, Haifa District, Israel (On-site)

5 days ago NVIDIA logo

Senior Photonic Layout Design Engineer

NVIDIA

Santa Clara, California, United States (On-site)$132–235.8K Yearly

Photonic Layout Design Engineer

Silicon Photonics Engineer

Silicon Photonics

SerDes

4 days ago Tenstorrent logo

Technical Program Manager, Architecture

Tenstorrent

Santa Clara, California, United States (Hybrid)$100–500K Yearly

Architecture TPM

Technical Program Management

RISC-V

SoC

4 wk. ago

CAD Layout Design Engineer

NVIDIA

Bengaluru, Karnataka, India (On-site)

4 wk. ago

Analog Mask Design Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)

Analog Layout Engineering

IC Design

CMOS

Cadence

5 days ago NVIDIA logo

Senior Technical Program Manager – VLSI

NVIDIA

Santa Clara, California, United States (Hybrid)$168–322K Yearly

Senior Technical Program Manager

Technical Program Manager

VLSI

Smartsheet

1 mo. ago

Senior Memory Mask Design Engineer

NVIDIA

Bengaluru, Karnataka, India (Hybrid)

Memory Design Engineering

IC Layout Engineering

CMOS

Memory Layout

3 wk. ago

ASIC Technical Program Manager

Etched

San Jose, California, United States (On-site)

ASIC

Technical Program Management

ASIC Development

RTL-to-GDSII Flow

5 days ago NVIDIA logo

Senior Director, Device and SPICE Modeling

NVIDIA

Santa Clara, California, United States (On-site)$308–471.5K Yearly

Device Modeling

SPICE Modeling

FinFET Process Technology

GAA Process Technology

2 wk. ago

Full-Chip Physical Design Verification Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100–500K Yearly

Physical Design Verification

SoC Tapeout Engineering

Physical Design Verification

DRC (Design Rule Check)

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