Jobs on Inference Jobs

ASIC Design Verification

SystemVerilog

3 wk. ago

NV

Senior ASIC Design Verification Engineer - LPU

NVIDIA

California, United States (Hybrid)$168–310.5K Yearly

ASIC Design Verification

Universal Verification Methodology (UVM)

SystemVerilog

2 wk. ago

NV

ASIC TOP Floorplan Design Engineer

NVIDIA

Shanghai, Shanghai, China (On-site)

Floorplan Engineering

Floorplan Design

2 wk. ago

NV

ASIC Design Engineer, Clocks

NVIDIA

Shanghai, Shanghai, China (On-site)

4 wk. ago

ET

ASIC Architect

Etched

San Jose, California, United States (On-site)$200–265K Yearly

Architecture

ASIC Architecture

Computer Architecture

1 wk. ago

NV

Senior ASIC Hardware Design Engineer

NVIDIA

Westford, Massachusetts, United States (On-site)$168–264.5K Yearly

Verilog

SystemVerilog

1 wk. ago

NV

Principal ASIC Chip Design Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)

Chip Design

Chip Design

2 wk. ago

NV

Senior ASIC Hardware Design Engineer

NVIDIA

Beer Sheva, Southern District, Israel (On-site)

RTL Implementation

3 wk. ago

CE

ASIC Architect

Cerebras

Sunnyvale, California, United States (On-site)

ASIC Architecture

Low Power ASIC Engineering

ASIC Architecture

Computer Architecture

1 wk. ago

NV

Low Power ASIC Engineer - New College Grad 2026

NVIDIA

Santa Clara, California, United States (On-site)$100–189.8K Yearly

Low Power Design Verification

Low Power Design

GPU Architecture

5 hr. ago

NV

Principal Engineer, Project Management - Chip Power

NVIDIA

Yokne'am, Northern District, Israel (On-site)

ASIC Power Analysis

Chip Design Engineering

ASIC Power

VLSI Design

4 wk. ago

NV

Power Analysis and Optimization Engineer

NVIDIA

Shanghai, Shanghai, China (On-site)

2 wk. ago

NV

Senior Front-End Power Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)

3 wk. ago

ET

Power Optimization Engineer

Etched

Cupertino, California, United States (On-site)

4 wk. ago

ET

Power Validation Engineer

Etched

San Jose, California, United States (On-site)

Power Validation Engineering