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Design Verification Jobs in San Jose, California, United States

Browse 24 Design Verification jobs in San Jose, California, United States on Inference Jobs.

24 jobs

3 wk. ago

Design Verification Engineer - Interface IP

Etched

San Jose, California, United States (On-site)$150–275K Yearly

Design Verification Engineering

ASIC Verification

Design Verification

SystemVerilog

3 wk. ago

Design Verification Engineer - SoC

Etched

San Jose, California, United States (On-site)$150–275K Yearly

Design Verification Engineering

ASIC Verification

SystemVerilog

Python

3 wk. ago

Formal Verification - DV

Etched

San Jose, California, United States (On-site)

Formal Verification

ASIC Design Verification

SystemVerilog

SystemVerilog Assertions

3 wk. ago

Design Verification Engineer - Internal IP

Etched

San Jose, California, United States (On-site)$150–275K Yearly

3 wk. ago

RTL Design Engineer

Etched

San Jose, California, United States (On-site)$150–275K Yearly

3 wk. ago

DV Intern

Etched

San Jose, California, United States (On-site)

3 wk. ago

DFT (Design For Test) Engineer

Etched

San Jose, California, United States (On-site)$150–275K Yearly

3 wk. ago

Physical Design Engineer - Block Level, Subsystem Implementation

Etched

San Jose, California, United States (On-site)

Physical Design Engineering

ASIC Design

RTL Synthesis

GDSII Sign-off

3 wk. ago

Physical Design Engineer

Etched

San Jose, California, United States (On-site)$150–275K Yearly

Physical Design Engineering

ASIC Design

Physical Design

RTL Synthesis

3 wk. ago

PD Intern

Etched

San Jose, California, United States (On-site)

3 wk. ago

Physical Design Engineer - Full Chip Implementation

Etched

San Jose, California, United States (On-site)

ASIC

Physical Design Engineering

Floorplanning

Place and Route

3 wk. ago

RTL Intern

Etched

San Jose, California, United States (On-site)

3 wk. ago

ASIC Technical Program Manager

Etched

San Jose, California, United States (On-site)

ASIC

Technical Program Management

ASIC Development

RTL-to-GDSII Flow

3 wk. ago

Applied AI Engineer, Silicon Engineering

Etched

San Jose, California, United States (On-site)$150–275K Yearly

Applied AI Engineering

AI Tooling Development

Python

LLM Agents

3 wk. ago

Design Verification Engineer

OpenAI

San Francisco, California, US or Remote (Worldwide)$226–445K Yearly

Hardware Engineering

Design Verification

SystemVerilog

2 wk. ago

Design Verification Engineer, Automotive Robotics

Tenstorrent

Worldwide (Remote)

3 wk. ago

Senior Formal Verification Engineer - LPU

NVIDIA

United States (Remote)$136–264.5K Yearly

Formal Verification Engineer

ASIC Verification Engineer

SystemVerilog Assertions

Formal Property Verification

5 days ago NVIDIA logo

Senior Silicon Validation Engineer

NVIDIA

United States (Remote)$168–264.5K Yearly

Silicon Validation Engineer

Hardware Validation

Silicon Validation

Post-Silicon Validation

1 day ago

RISC-V CPU Microarchitecture / RTL

Tenstorrent

United States (Remote)$100–500K Yearly

1 wk. ago

Mixed Signal IC Layout Design Engineer - Contractor

Tenstorrent

North America (Remote)$100–500K Yearly

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