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DRC Verification Jobs

Browse 14 DRC Verification jobs on Inference Jobs.

14 jobs

5 mo. ago

Full-Chip Physical Design Verification Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100–500K Yearly

Physical Design Verification

SoC Tapeout Engineering

Physical Design Verification

DRC (Design Rule Check)

3 mo. ago

Senior Full Chip Layout and Physical Verification CAD Engineer

NVIDIA

Yokneam, Haifa District, Israel (On-site)

Physical Design Engineering

CAD Engineering

Python

Tcl

1 yr. ago

Physical Design Backend Engineer

NVIDIA

Tel Aviv-Yafo, Tel Aviv District, Israel (On-site)

2 mo. ago

Senior Physical Design Engineer - Bengaluru, Multiple Vacancies

Graphcore

Bengaluru, Karnataka, India (On-site)

8 mo. ago

Physical Design Backend Engineer

NVIDIA

Yokneam, Haifa District, Israel (On-site)

2 wk. ago

Staff Silicon Physical Design Engineer - Bengaluru

Graphcore

Bengaluru, Karnataka, India (On-site)

9 mo. ago

Silicon Physical Design Engineer

Graphcore

Bristol, England, United Kingdom (On-site)

Physical Design

Silicon Physical Design

Physical Design

Tcl

2 mo. ago

AI Silicon Physical Design Engineer

Cerebras

Sunnyvale, California, United States (On-site)$150–250K Yearly

Physical Design Engineering

Silicon Engineering

Physical Design

Physical Verification

2 mo. ago

Physical Design Engineer

Cerebras

Sunnyvale, California, United States (On-site)$230–280K Yearly

Physical Design Engineering

ASIC Design

Physical Design

Physical Verification

9 mo. ago

Senior Physical Design Backend Engineer

NVIDIA

Tel Aviv District, Israel (On-site)

2 mo. ago

Physical Design Engineer - Block Level, Subsystem Implementation

Etched

San Jose, California, United States (On-site)

Physical Design Engineering

ASIC Design

RTL Synthesis

GDSII Sign-off

5 mo. ago

Analog IC Layout Engineer

Neuralink

South San Francisco, California, United States (On-site)$83–139K Yearly

Brain Interfaces Hardware

Analog IC Layout Engineering

Analog IC Layout

Mixed-Signal IC Layout

3 wk. ago

Substrate IC Package Layout Design Engineer

Etched

San Jose, California, United States (On-site)

IC Packaging

Hardware Engineering

Substrate Layout

Cadence Allegro Package Designer

3 days ago Etched logo

Substrate IC Package Layout Design Engineer

Etched

San Jose, California, United States (On-site)

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