Jobs on Inference Jobs

4 wk. ago

Senior Full Chip Layout and Physical Verification CAD Engineer

NVIDIA

Yokne'am, Northern District, Israel (On-site)

Physical Design Verification

CAD Engineering

Python

Tcl

2 wk. ago

Full-Chip Physical Design Verification Engineer

Tenstorrent

Santa Clara, California, United States (Hybrid)$100–500K Yearly

SoC Tapeout Engineering

Physical Design Verification

DRC (Design Rule Check)

3 wk. ago

3D Physical Design Engineer

Cerebras

Sunnyvale, California, United States (On-site)$150–270K Yearly

2 wk. ago

Physical Design Backend Engineer

NVIDIA

Tel Aviv District, Israel (On-site)

1 wk. ago

Mixed Signal IC Layout Design Engineer - Contractor

Tenstorrent

North America (Remote)$100–500K Yearly

5 days ago NVIDIA logo

Physical Design Backend Engineer

NVIDIA

Yokneam, Haifa District, Israel (On-site)

3 wk. ago

Senior Physical Design Engineer - Bengaluru, Multiple Vacancies

Graphcore

Bengaluru, Karnataka, India (On-site)

1 wk. ago

Silicon Physical Design Engineer

Graphcore

Bristol, England, United Kingdom (On-site)

Silicon Physical Design

Tcl

3 wk. ago

AI Silicon Physical Design Engineer

Cerebras

Sunnyvale, California, United States (On-site)$150–250K Yearly

Silicon Engineering

3 wk. ago

Physical Design Engineer

Cerebras

Sunnyvale, California, United States (On-site)$230–280K Yearly

ASIC Design

3 wk. ago

Physical Design Engineer (Bengaluru)

Cerebras

Bengaluru, Karnataka, India (On-site)

Physical Design Engineer

Silicon Engineering

Photonic Integrated Circuit Design

4 wk. ago

Senior Physical Design Backend Engineer

NVIDIA

Tel Aviv District, Israel (On-site)

2 days ago NVIDIA logo

Principal Photonics IC Design Engineer

NVIDIA

Santa Clara, California, United States (On-site)$232–368K Yearly

Silicon Photonics Engineer

Cadence Virtuoso

PIC Design

3 wk. ago

Analog IC Layout Engineer

Neuralink

South San Francisco, California, United States (On-site)$83–139K Yearly

Brain Interfaces Hardware

Analog IC Layout Engineering

Analog IC Layout

Mixed-Signal IC Layout

3 wk. ago

Physical Design Engineer - Block Level, Subsystem Implementation

Etched

San Jose, California, United States (On-site)